IP Design Verification Engineer

IP Design Verification Engineer in Bengaluru

Intel is on the hunt for a meticulous and experienced IP Design Verification Engineer to join our dynamic team in Bengaluru. This role is crucial for ensuring that our IP logic designs meet stringent specifications and quality standards. As a member of our team, you will play a pivotal role in developing verification plans, test benches, and environments to ensure comprehensive coverage and conformity to microarchitecture specifications. If you are passionate about pushing the boundaries of technology and have a keen eye for detail, we encourage you to apply for this exciting opportunity.

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Job Description

The IP Design Verification Engineer is responsible for performing functional verification of IP logic to confirm that the design meets specification requirements. Key responsibilities include:

  • Developing IP verification plans, test benches, and verification environments.
  • Executing verification plans, analyzing power and timing, and uncovering bugs.
  • Replicating, root causing, and debugging issues in the pre-silicon environment.
  • Collaborating with architects, RTL developers, and physical design teams to enhance verification of complex architectural and microarchitectural features.
  • Documenting test plans and participating in technical reviews with design and architecture teams.
  • Maintaining and improving existing functional verification infrastructure and methodology.

Qualifications

Minimum Qualifications

Candidates must possess the following qualifications to be considered for this position:

  • Educational Requirement:
    • Bachelor’s degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6-8 years of industry work experience.
    • Master’s degree in the above fields plus 5-7 years of industry work experience.
    • PhD in the above fields plus 4+ years of related work experience.
  • Experience:
    • 6+ years in relevant Pre-Silicon validation position with multiple project cycles.
    • Proficient in SystemVerilog/UVM, C/C++, Verilog, assembly, and Python.
    • Solid experience in developing testbenches for validating PCIe Generations IP’s (Gen4 onwards).
    • Knowledge of advanced computer architecture and micro-architecture concepts.
    • Experience with design verification and validation methodologies and strategies.

Preferred Qualifications

  • Deep knowledge of PCIe TL/DL/PHY layer, PCIe generation later than Gen4, PIPE architecture, CXL, AMBA protocols.
  • Excellent communication skills and team collaboration.
  • Ability to work independently in a fast-paced environment.

Important Dates

Please visit the Intel Careers page for the most up-to-date information on important dates related to the application process.

How to Apply

Interested candidates are encouraged to apply directly through the Intel Jobs Portal. Make sure to attach a detailed resume and cover letter highlighting your qualifications and experience relevant to the role.

Benefits

Intel offers a competitive total compensation package including:

  • Competitive pay and stock options
  • Bonuses
  • Comprehensive health, retirement, and vacation benefits

For more information, please visit Intel’s Benefits page.

Working Model

This role is eligible for Intel’s hybrid work model, allowing employees to split their time between working on-site at their assigned Intel site and off-site. The work model may change according to business needs.